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| NDF08N60Z, NDP08N60Z N-Channel Power MOSFET 600 V, 0.95 W Features * * * * Low ON Resistance Low Gate Charge 100% Avalanche Tested These Devices are Pb-Free and are RoHS Compliant VDSS 600 V http://onsemi.com RDS(ON) (MAX) @ 3.5 A 0.95 W ABSOLUTE MAXIMUM RATINGS (TC = 25C unless otherwise noted) Rating Drain-to-Source Voltage Continuous Drain Current RqJC Continuous Drain Current RqJC TA = 100C Pulsed Drain Current, VGS @ 10 V Power Dissipation Gate-to-Source Voltage Single Pulse Avalanche Energy, ID = 7.5 A ESD (HBM) (JESD 22-A114) RMS Isolation Voltage (t = 0.3 sec., R.H. 30%, TA = 25C) (Figure 14) Peak Diode Recovery Continuous Source Current (Body Diode) Maximum Temperature for Soldering Leads Operating Junction and Storage Temperature Range Symbol VDSS ID ID IDM PD VGS EAS Vesd VISO 4500 NDF08N60Z NDP08N60Z Unit V 7.5 4.8 30 139 30 235 4000 A A A W V mJ V V 600 7.5 (Note 1) 4.8 (Note 1) 30 (Note 1) 35 N-Channel D (2) G (1) TO-220FP CASE 221D STYLE 1 S (3) MARKING DIAGRAM dv/dt IS TL TJ, Tstg 4.5 7.5 260 -55 to 150 V/ns A C C TO-220 CASE 221A STYLE 5 NDF08N60ZG or NDP08N60ZG AYWW Gate Source Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Limited by maximum junction temperature 2. ID v 7.5 A, di/dt 200 A/ms, VDD BVDSS, TJ 150C. Drain A Y WW G = Location Code = Year = Work Week = Pb-Free Package ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet. (c) Semiconductor Components Industries, LLC, 2010 July, 2010 - Rev. 0 1 Publication Order Number: NDF08N60Z/D NDF08N60Z, NDP08N60Z THERMAL RESISTANCE Parameter Junction-to-Case (Drain) Junction-to-Ambient Steady State (Note 3) 3. Insertion mounted Symbol RqJC RqJA NDF08N60Z 3.6 50 NDP08N60Z 0.9 50 Unit C/W ELECTRICAL CHARACTERISTICS (TJ = 25C unless otherwise noted) Characteristic OFF CHARACTERISTICS Drain-to-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Drain-to-Source Leakage Current VGS = 0 V, ID = 1 mA Reference to 25C, ID = 1 mA VDS = 600 V, VGS = 0 V VGS = 20 V VGS = 10 V, ID = 3.5 A VDS = VGS, ID = 100 mA VDS = 15 V, ID = 3.5 A 25C 125C IGSS RDS(on) VGS(th) gFS Ciss Coss Crss Qg VDD = 300 V, ID = 7.5 A, VGS = 10 V Qgs Qgd VGP Rg td(on) VDD = 300 V, ID = 7.5 A, VGS = 10 V, RG = 5 W tr td(off) tf 3.0 6.3 1140 129 30 39 7.5 21 6.2 1.6 14 22 36 15 V W ns nC 0.82 BVDSS DBVDSS/ DTJ IDSS 600 0.6 1 50 10 0.95 4.5 mA W V S pF V V/C mA Test Conditions Symbol Min Typ Max Unit Gate-to-Source Forward Leakage ON CHARACTERISTICS (Note 4) Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance DYNAMIC CHARACTERISTICS Input Capacitance Output Capacitance Reverse Transfer Capacitance Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Plateau Voltage Gate Resistance RESISTIVE SWITCHING CHARACTERISTICS Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time VDS = 25 V, VGS = 0 V, f = 1.0 MHz SOURCE-DRAIN DIODE CHARACTERISTICS (TC = 25C unless otherwise noted) Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge 4. Pulse Width 380 ms, Duty Cycle 2%. IS = 7.5 A, VGS = 0 V VGS = 0 V, VDD = 30 V IS = 7.5 A, di/dt = 100 A/ms VSD trr Qrr 320 2.2 1.6 V ns mC http://onsemi.com 2 NDF08N60Z, NDP08N60Z TYPICAL CHARACTERISTICS 20 18 ID, DRAIN CURRENT (A) 14 12 10 8 6 4 2 0 0 5 10 5.5 V 5.0 V 15 20 25 VDS, DRAIN-TO-SOURCE VOLTAGE (V) 6.0 V VGS = 10 V 7.0 V 6.5 V ID, DRAIN CURRENT (A) 16 20 18 16 14 12 10 8 6 4 2 0 3 4 5 6 TJ = 150C TJ = 25C TJ = -55C 7 8 9 10 VDS = 25 V Figure 1. On-Region Characteristics VGS, GATE-TO-SOURCE VOLTAGE (V) Figure 2. Transfer Characteristics RDS(on), DRAIN-TO-SOURCE RESISTANCE (W) RDS(on), DRAIN-TO-SOURCE RESISTANCE (W) 1.25 1.20 1.15 1.10 1.05 1.00 0.95 0.90 0.85 0.80 0.75 5.5 6.0 6.5 7.0 7.5 8.0 8.5 9.0 9.5 ID = 3.5 A TJ = 25C 1.25 1.20 1.15 1.10 1.05 1.00 0.95 0.90 0.85 0.80 0.75 0 VGS = 10 V TJ = 25C 10.0 1 2 3 4 5 6 7 8 9 10 VGS, GATE-TO-SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A) Figure 3. On-Region versus Gate-to-Source Voltage BVDSS, NORMALIZED BREAKDOWN VOLTAGE (V) RDS(on), DRAIN-TO-SOURCE RESISTANCE (NORMALIZED) 2.75 2.50 2.25 2.00 1.75 1.50 1.25 1.00 0.75 0.50 0.25 -50 -25 0 25 50 75 100 125 1.15 Figure 4. On-Resistance versus Drain Current and Gate Voltage ID = 3.5 A VGS = 10 V ID = 1 mA 1.10 1.05 1.00 0.95 0.90 150 -50 -25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (C) TJ, JUNCTION TEMPERATURE (C) Figure 5. On-Resistance Variation with Temperature http://onsemi.com 3 Figure 6. BVDSS Variation with Temperature NDF08N60Z, NDP08N60Z TYPICAL CHARACTERISTICS 100 2750 2500 C, CAPACITANCE (pF) 2250 2000 1750 1500 1250 1000 750 500 250 0.1 0 50 100 150 200 250 300 350 400 450 500 550 600 VDS, DRAIN-TO-SOURCE VOLTAGE (V) 0 0.01 0.1 1 10 100 Crss Coss Ciss IDSS, LEAKAGE (mA) TJ = 25C VGS = 0 V f = 1 MHz 10 TJ = 150C 1 TJ = 125C VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 7. Drain-to-Source Leakage Current versus Voltage 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 VGS, GATE-TO-SOURCE VOLTAGE (V) Figure 8. Capacitance Variation QT VDS VGS QGS QGD 300 250 200 150 VDS = 300 V ID = 7.5 A TJ = 25C 100 50 0 40 0 4 8 12 16 20 24 28 32 36 Figure 9. Gate-to-Source Voltage and Drain-to-Source Voltage versus Total Charge Qg, TOTAL GATE CHARGE (nC) 1000 IS, SOURCE CURRENT (A) VDD = 300 V ID = 7.5 A VGS = 10 V t, TIME (ns) 100 10.0 td(off) tr tf td(on) TJ = 150C 1.0 25C 125C -55C 10 1 1 10 RG, GATE RESISTANCE (W) 100 0.1 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 VSD, SOURCE-TO-DRAIN VOLTAGE (V) VDS, DRAIN-TO-SOURCE VOLTAGE (V) 350 1.2 Figure 10. Resistive Switching Time Variation versus Gate Resistance Figure 11. Diode Forward Voltage versus Current http://onsemi.com 4 NDF08N60Z, NDP08N60Z 100 VGS v 30 V SINGLE PULSE TC = 25C dc 1 1 ms 100 ms 10 ms ID, DRAIN CURRENT (A) 10 10 ms 0.1 0.01 0.1 RDS(on) LIMIT THERMAL LIMIT PACKAGE LIMIT 1 10 100 1000 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 12. Maximum Rated Forward Biased Safe Operating Area NDF08N60Z 10 DUTY CYCLE = 0.5 R(t) (C/W) 1 0.2 0.1 0.05 0.1 0.02 0.01 SINGLE PULSE 0.01 1E-06 1E-05 1E-04 1E-03 1E-02 1E-01 1E+00 1E+01 RqJC = 3.6C/W Steady State 1E+02 1E+03 PULSE TIME (s) Figure 13. Thermal Impedance (Junction-to-Case) for NDF08N60Z LEADS HEATSINK 0.110 MIN Figure 14. Isolation Test Diagram Measurement made between leads and heatsink with all leads shorted together. *For additional mounting information, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ORDERING INFORMATION Order Number NDF08N60ZG NDP08N60ZG Package TO-220FP (Pb-Free) TO-220AB (Pb-Free) Shipping 50 Units / Rail 50 Units / Rail (In Development) http://onsemi.com 5 NDF08N60Z, NDP08N60Z PACKAGE DIMENSIONS TO-220 FULLPAK CASE 221D-03 ISSUE K -T- F Q A 123 SEATING PLANE -B- U C S NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH 3. 221D-01 THRU 221D-02 OBSOLETE, NEW STANDARD 221D-03. INCHES MIN MAX 0.617 0.635 0.392 0.419 0.177 0.193 0.024 0.039 0.116 0.129 0.100 BSC 0.118 0.135 0.018 0.025 0.503 0.541 0.048 0.058 0.200 BSC 0.122 0.138 0.099 0.117 0.092 0.113 0.239 0.271 MILLIMETERS MIN MAX 15.67 16.12 9.96 10.63 4.50 4.90 0.60 1.00 2.95 3.28 2.54 BSC 3.00 3.43 0.45 0.63 12.78 13.73 1.23 1.47 5.08 BSC 3.10 3.50 2.51 2.96 2.34 2.87 6.06 6.88 H K -Y- G N L D 3 PL M J R DIM A B C D F G H J K L N Q R S U 0.25 (0.010) B M Y STYLE 1: PIN 1. GATE 2. DRAIN 3. SOURCE TO-220 CASE 221A-09 ISSUE AF -T- B 4 SEATING PLANE F T C S NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND LEAD IRREGULARITIES ARE ALLOWED. DIM A B C D F G H J K L N Q R S T U V Z INCHES MIN MAX 0.570 0.620 0.380 0.405 0.160 0.190 0.025 0.035 0.142 0.161 0.095 0.105 0.110 0.155 0.014 0.025 0.500 0.562 0.045 0.060 0.190 0.210 0.100 0.120 0.080 0.110 0.045 0.055 0.235 0.255 0.000 0.050 0.045 ----0.080 GATE DRAIN SOURCE DRAIN MILLIMETERS MIN MAX 14.48 15.75 9.66 10.28 4.07 4.82 0.64 0.88 3.61 4.09 2.42 2.66 2.80 3.93 0.36 0.64 12.70 14.27 1.15 1.52 4.83 5.33 2.54 3.04 2.04 2.79 1.15 1.39 5.97 6.47 0.00 1.27 1.15 ----2.04 Q 123 A U K H Z L V G D N R J STYLE 5: PIN 1. 2. 3. 4. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81-3-5773-3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative http://onsemi.com 6 NDF08N60Z/D |
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